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	SOLVING RECONFIGURATION FOR OPTIMAL DG AND CAPACITOR ALLOCATION USING GENETIC ALGORITHM-IEEE 118 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	DIFFERENT LOAD CONDITION-RECONFIGURATION FOR DG AND CAPACITOR ALLOCATION-GENETIC ALGORITHM-118 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	SOLVING RECONFIGURATION FOR OPTIMAL DG AND CAPACITOR ALLOCATION USING GENETIC ALGORITHM-IEEE 119 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	GENETIC ALGORITHM-POWER LOSS MINIMIZATION-RECONFIGURATION AND CAPACITOR PLACEMENT-IEEE 118 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	DUAL TECHNIQUE FOR SOLVING RECONFIGURATION AND OPTIMAL DG ALLOCATION-GENETIC ALGORITHM-IEEE 119 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	DUAL TECHNIQUE OF RECONFIGURATION AND CAPACITOR PLACEMENT-SALP SWARM ALGORITHM-IEEE 118 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	SIMULTANEOUS OPTIMAL NETWORK RECONFIGURATION AND DG PLACEMENT-SALP SWARM ALGORITHM-IEEE 118 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	DOLPHIN ECHOLOCATION ALGORITHM-RECONFIGURATION, DG AND CAPACITOR PLACEMENT-IEEE 118 BUS SYSTEM (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	RECONFIGURATION u0026 CAPACITOR ALLOCATION-IEEE 118 BUS-DIFFERENT LOAD-IMPERIALIST COMPETITIVE ALGORITHM (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View
	RECONFIGURATION AND DG ALLOCATION-GENETIC ALGORITHM-POWER LOSS MINIMIZATION-DIFFERENT LOAD-118 BUS (VERILOG COURSE TEAM-ELECTRICAL PROJECTS) View